74HCT4059 Overview
The 74HC/HCT4059 are high-speed Si-gate CMOS devices and are pin patible with the “4059” of the “4000B” series. They are specified in pliance with JEDEC standard no. 7A. The 74HC/HCT4059 are divide-by-n counters which can be programmed to divide an input frequency by any number (n) from 3 to 15 999. There are four operating modes, timer, divide-by-n, divide-by-10 000 and master preset, which are defined by the mode select inputs (Ka to Kc) and the latch enable input (LE) as shown in the Function table. The plete counter consists of a first counting stage, an intermediate counting stage and a fifth counting stage. The first counter stage consists of four independent flip-flops. Depending on the divide-by-mode, at least one flip-flop is placed at the input of the intermediate stage (the remaining flip-flops are placed at the fifth stage with a place value of thousands). The intermediate...
74HCT4059 Key Features
- Synchronous programmable divide-by-n counter
- Presettable down counter
- Fully static operation
- Mode select control of initial decade counting function (divide-by-10, 8, 5, 4 and 2)
- Master preset initialization
- Latchable output
- Easily cascadable with other counters
- Four operating modes: timer divider-by-n divide-by-10 000 master preset
- Output capability: standard
- ICC category: MSI