74HCT42 Datasheet | Philips Semiconductors

FEATURES - Mutually exclusive outputs - 1-of-8 demultiplexing capability - Outputs disabled for input codes above nine - Output capability: standard - ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin patible with low power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT42 The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW outputs. The active LOW outputs facilitate addressing other MSI circuits with active LOW input enables. The logic design of the “42” ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most significant input (A3) produces an useful inhibit function when the “42” is used as a 1-of-8 decoder. The A3 input can also be used as the data input in an 8-output demultiplexer application. TYPICAL SYMBOL t PHL/ t PLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in p F VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay An to Yn input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 p F; VCC = 5 V 14 3.5 37 HCT 17 3.5 37 ns p F p F UNIT December 1990 Philips Semiconductors Product specification BCD to decimal decoder (1-of-10) PIN DESCRIPTION PIN NO. 1, 2, 3, 4, 5, 6, 7, 9, 10, 11 8 15, 14, 13, 12 16 SYMBOL Y0 to Y9 GND A0 to A3 VCC 74HC/HCT42 NAME AND FUNCTION multiplexer outputs ground (0 V) data inputs positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic...