74HCT73 Datasheet Dual Jk Flip-flop

Manufacturer: Philips Semiconductors (now NXP Semiconductors)

Overview: 74HC73 Dual JK ﬂip-ﬂop with reset; negative-edge trigger Rev. 03 — 12 November 2004 Product data sheet 1.

Datasheet Details

Part number	74HCT73
Manufacturer	Philips Semiconductors (now NXP Semiconductors)
File Size	110.18 KB
Description	Dual JK flip-flop
Datasheet	74HCT73_PhilipsSemiconductors.pdf

The 74HC73 is a high-speed Si-gate CMOS device and is pin patible with low-power Schottky TTL (LSTTL).

The 74HC73 is speciﬁed in pliance with JEDEC standard no.

7A.

s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Speciﬁed from.
40 °C to +80 °C and from.
40 °C to +125 °C. Philips Semiconductors 74HC73 Dual JK ﬂip-ﬂop with reset; negative-edge trigger 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol tPHL, tPLH Parameter propagation delay nCP to nQ nCP t.

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