74LV107 Description
The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function patible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also plementary Q and Q outputs.
74LV107 Key Features
- Wide operating: 1.0 to 5.5 V
- Optimized for low voltage