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74LVC109 - Dual JK flip-flop

General Description

The 74LVC109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.

The 74LVC109 is a dual positive-edge triggered JK-type flip-flop featuring individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs.

Key Features

  • Wide supply voltage range of 1.2 to 3.6 V.
  • In accordance with JEDEC standard no. 8-1A.
  • Inputs accept voltages up to 5.5 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Output capability: standard.
  • ICC category: flip-flops.

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Other Datasheets by Philips Semiconductors (now NXP Semiconductors)

Part Number Description
74LVC10 Triple 3-input NAND gate
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74LVC109 Dual JK flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1997 Mar 18 IC24 Data Handbook 1998 Apr 28 Philips Semiconductors Philips Semiconductors Product specification Dual JK flip-flop with set and reset; positive-edge trigger 74LVC109 FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • Inputs accept voltages up to 5.5 V • CMOS low power consumption • Direct interface with TTL levels • Output capability: standard • ICC category: flip-flops DESCRIPTION The 74LVC109 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT109.