SAA2003 Datasheet | Philips Semiconductors

FEATURES - Single-chip stereo filter and codec - Wide operating voltage range: 2.7 to 5.5 V - Low-power consumption: 98 m W; 3.0 V - Sleep mode for low power and low Electromagnetic Interference (EMI) - Transparent serial audio data mode in sleep - IEC 958 digital output - Peak level detector for start of track detection or VU meter - Versatile fade processor; slow/fast fade, mute, 12 d B attenuation - Serial audio interface for I2S or EIAJ formats - Error concealment - Three-wire L3 bus microcontroller interface - Three sample rates: - 32 k Hz - 44.1 k Hz - 48 k Hz - Internal or external clock source - Three programmable outputs - Small surface mounted package (SOT307). ORDERING INFORMATION EXTENDED TYPE NUMBER SAA2003H Note PACKAGE PINS 44 PIN POSITION QFP(1) MATERIAL plastic GENERAL DESCRIPTION The SAA2003 performs the sub-band filtering and audio frame codec functions in the Precision Adaptive Sub-band Coding (PASC) system. It can be used as a stand-alone decoder for playback only applications, but requires the addition of an Adaptive Allocation and Scale Factor processor (SAA2013) in order to perform PASC encoding in a DCC record system. CODE SOT307 1. When using reflow soldering it is remended that the Dry Packing instructions in the “Quality Reference Pocketbook” are followed. The pocketbook can be ordered using the code 9398 510 34011. May 1994 Philips Semiconductors Preliminary specification Stereo filter and codec BLOCK DIAGRAM SAA2003 handbook, full pagewidth X22OUT X24OUT CLK24 FS256 X22IN X24IN CLK22 X256 6 5 10 9 4 11 37 38 VDD1 V DD2 VDD3 28 7 39 32 MUTEDAC 31 ATTDAC DEEMDAC CLOCK GENERATOR TEST0 TEST1 IECOP 19 20 29 IEC 958 OUTPUT FS128 6.15 MHz FS256 SBMCLK 25 SBWS WS SCK SD1 SD2 34 33 36 35 BASEBAND SERIAL INTERFACE AND PEAK DETECTOR SUBBAND SERIAL INTERFACE 24 23 22 26 SBCL SBDA SBDIR SBEF STEREO SUBBAND FILTER PROCESSOR PASC CODEC PROCESSOR 21 FILTERED DATA INTERFACE MICROCONTROLLER INTERFACE AND CONTROL 13...