Full PDF Text Transcription for SSTV16859 (Reference)
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INTEGRATED CIRCUITS SSTV16859 2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM Product data 2000 Dec 01 File under Integrated Circuits — ICL03 2002 Fe...
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roduct data 2000 Dec 01 File under Integrated Circuits — ICL03 2002 Feb 19 Philips Semiconductors Philips Semiconductors Product data 2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM SSTV16859 FEATURES • Stub-series terminated logic for 2.5 V VDD (SSTL_2) • Optimized for stacked DDR (Double Data Rate) SDRAM applications DDR (Double Data Rate) SDRAM and SDRAM II Memory Modules. Different from traditional SDRAM, DDR SDRAM transfers data on both clock edges (rising and falling), thus doubling the peak bus bandwidth. A DDR DRAM rated at 133 MHz will have a burst rate of 266 MHz. The device data inputs consi
SSTV16859 Datasheet
