UAA3580 Datasheet | Philips Semiconductors

FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION RF receiver front-end and RF VCO Channel filter and AGC RF VCO RF LO section RF fractional-N synthesizer PLL Clock PLL Control OPERATING MODES Basic operating mode AGC gain look-up table RF PLL synthesizer Clock PLL synthesizer PROGRAMMING Serial programming bus Data format Register contents LIMITING VALUES THERMAL CHARACTERISTICS DC CHARACTERISTICS AC CHARACTERISTICS SERIAL BUS TIMING CHARACTERISTICS APPLICATION INFORMATION 17 18 18.1 18.2 18.3 18.4 18.5 19 20 21 PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS 2002 Oct 30 Philips Semiconductors Objective specification Wideband code division multiple access frequency division duplex zero IF receiver 1 FEATURES 3 GENERAL DESCRIPTION - Low noise wide dynamic range for zero IF receivers - 79 d B gain control range; in steps of 1 d B - Channel filters - 96 d B voltage gain - Fully integrated fractional-N synthesizer with AFC control capability - Fully integrated RF VCO with integrated supply voltage regulator - Fully differential design to minimize crosstalk - Supply voltage from 2.4 to 3.3 V - 3-wire serial interface bus - HVQFN24 package. 2 APPLICATIONS The UAA3580 is a Bi CMOS integrated circuit receiver intended for the Third Generation Partnership Project (3GPP) specification for the Universal Mobile Telemunication System (UMTS). The circuit is specially designed for the Frequency Division Duplex (FDD) mode of the Wide Code Division Multiple Access (WCDMA) that operates in the 2110 to 2170 MHz band. The UAA3580 contains the whole analog receive chain from Radio Frequency (RF) Low Noise Amplifier (LNA) to baseband IQ outputs including a...