P24C32H Datasheet | Puya Semiconductor

Description The P24C32H is I2C-patible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 32 Kb (4 Kbytes), which is organized in 32 bytes per page. Features - Single Supply Voltage and Support Fast and High Speed Mode - Minimum operating voltage down to 1.7 V - 400 k Hz/1 MHz clock from 1.7 V to 5.5 V - 3.4 MHz clock from 1.7 V to 5.5 V - Low power CMOS technology - Read current 0.3 m A (5.5 V 400 k Hz, typical) - Schmitt Trigger, Filtered Inputs for Noise Suppression - Transparent ECC on each group of four bytes which can correct 1-bit error - Write protect of the whole memory array - Additional write lockable page (Identification page) - Additional 128 bits Serial Number (Unique ID) - Sequential & Random Read Features - 32 bytes Page Write Modes, Partial Page Writes Allowed - Self-timed Write Cycle (5 ms maximum) - High Reliability - Endurance: 4 Million Write Cycles - Data Retention: 200 Years - HBM: 6 k V - Latch up Capability: +/- 200m A(25C) - Package: PDIP8, SOP8, TSSOP8, MSOP8, UDFN8, SOT23-5, TSOT23-5 1/28 1. Pin Configuration 1.1 Pin Configuration Figure 1-1 Pin Configuration E0 1 E1 2 E2 3 Vss 4 8 VCC 7 WCB 6 SCL 5 SDA PDIP8/SOP8/MSOP8/TSSOP8/UDFN8 P24C32H Datasheet Rev.1.1 SCL 1 5 WCB Vss...