HYB18TC1G160BF - 1-Gbit Double-Data-Rate-Two SDRAM

This page provides the datasheet information for the HYB18TC1G160BF, a member of the HYB18TC1G800BF 1-Gbit Double-Data-Rate-Two SDRAM family.

Product Overview

Qimonda

Part number	HYB18TC1G160BF
Manufacturer	Qimonda
File Size	3.54 MB
Description	1-Gbit Double-Data-Rate-Two SDRAM
Datasheet	HYB18TC1G160BF Datasheet
Additional preview pages of the HYB18TC1G160BF datasheet.

latched at the cross point of differential clocks (CK rising and CK falling).

All I/Os are synchronized with a single ended DQS or differential DQS-DQS pair in a source synchronous fashion.

The 1-Gbit Double-Data-Rate-Two SDRAM offers the following key features:.
Off-Chip-Driver impedance adjustment (OCD) and On.
1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) compatible I/O Die-Termination (ODT) for better signal quality.
DRAM organizations with 8 and 16 data in/outputs.
Auto-Precharge operation for read and write bursts.
Double Data Rate architecture: two data transfers per.
Auto-Refresh, Self-Refresh and power saving Powe.

Other Datasheets by Qimonda

Published: Dec 5, 2013 |