HD74LV1G126A Overview
The HD74LV1G126A has a bus buffer gate with 3 state output in a 5 pin package. Output is disabled when the associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor;.
HD74LV1G126A Key Features
- The basic gate function is lined up as Renesas uni logic series
- Supplied on emboss taping for high-speed automatic mounting
- Electrical characteristics equivalent to the HD74LV126A Supply voltage range : 1.65 to 5.5 V Operating temperature range
- All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
- Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
- All the logical input has hysteresis voltage for the slow transition
- Ordering Information
- HD74LV1G126A
- HD74LV1G126A