Download 5P49V6965 Datasheet PDF
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5P49V6965 Description

The 5P49V6965 is a programmable clock generator intended for high-performance consumer, networking, industrial, puting, and data-munications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. This is Renesas’ sixth generation of programmable clock technology (VersaClock 6E).

5P49V6965 Key Features

  • Flexible 1.8V, 2.5V, 3.3V power-rails
  • High-performance, low phase noise PLL, < 0.5ps RMS typical phase jitter on outputs
  • Four banks of internal OTP memory
  • In-system or factory programmable
  • 2 select pins accessible with processor GPIOs or
  • I2C serial programming interface
  • 0xD0 or 0xD4 I2C address options allows multiple devices
  • Reference LVCMOS output clock
  • Four universal output pairs individually configurable
  • Differential (LVPECL, LVDS or HCSL)