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72V241 - 3.3 VOLT CMOS SyncFIFO

This page provides the datasheet information for the 72V241, a member of the 72V201 3.3 VOLT CMOS SyncFIFO family.

Datasheet Summary

Description

are very high-speed, low-power First-In, First-Out (FIFO) memories with clocked read and write controls.

Features

  • 256 x 9-bit organization IDT72V201.
  • 512 x 9-bit organization IDT72V211.
  • 1,024 x 9-bit organization IDT72V221.
  • 2,048 x 9-bit organization IDT72V231.
  • 4,096 x 9-bit organization IDT72V241.
  • 8,192 x 9-bit organization IDT72V251.
  • 10 ns read/write cycle time.
  • 5V input tolerant.
  • Read and Write clocks can be independent.
  • Dual-Ported zero fall-through time architecture.
  • Empty and Full Flags signal FIFO sta.

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Datasheet preview – 72V241

Datasheet Details

Part number 72V241
Manufacturer Renesas
File Size 314.16 KB
Description 3.3 VOLT CMOS SyncFIFO
Datasheet download datasheet 72V241 Datasheet
Additional preview pages of the 72V241 datasheet.

📁 Similar Datasheet

Other Datasheets by Renesas
  • 72V245 - 3.3 VOLT CMOS SyncFIFO
  • 72V201 - 3.3 VOLT CMOS SyncFIFO
  • 72V205 - 3.3 VOLT CMOS SyncFIFO
  • 72V211 - 3.3 VOLT CMOS SyncFIFO
  • 72V215 - 3.3 VOLT CMOS SyncFIFO
  • 72V221 - 3.3 VOLT CMOS SyncFIFO
  • 72V225 - 3.3 VOLT CMOS SyncFIFO
  • 72V231 - 3.3 VOLT CMOS SyncFIFO

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