87974I Description
The 87974I is a low skew, low jitter 1-to-15 LVCMOS/ LVTTL Clock Generator/Zero Delay Buffer. In addition, the external feedback connection provides for a wide selection of output-to-input frequency ratios. The CLK0 and CLK1 pins allow for redundant clocking on the input and dynamically switching the PLL between two clock sources.
87974I Key Features
- Fully integrated PLL
- Fifteen single ended 3.3V LVCMOS/LVTTL outputs
- Two LVCMOS/LVTTL clock inputs for redundant clock applica
- CLK0 and CLK1 accepts the following input levels
- Output frequency range: 8.33MHz to 125MHz
- VCO range: 200MHz to 500MHz
- External feedback for ”zero delay” clock regeneration
- Cycle-to-cycle jitter: ±100ps (typical)
- Output skew: 350ps (maximum)
- 3.3V operating supply