8V79S680
Description
The 8V79S680 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B applications.
Key Features
- 8 dedicated clock outputs
- Clock phase delay circuits Clock phase delay circuits
- Clock: delay unit is the clock period; 256 steps
- SYSREF: Configurable precision phase delay circuits: 8 steps of 131ps, 262ps, 393ps, or 524ps Flexible differential outputs
- LVDS/LVPECL configurable
- Amplitude configurable
- Power-down modes for unused outputs
- Supports DC and AC coupling
- QREF (SYSREF) output pre-bias feature to prevent glitches when turnin
