Renesas Electronics 9DBL0853
The 9DBL08x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family. They support PCIe Gen1-4 Common Clock (CC) architectures and also support NVLINK applications. The 9DBL08x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems.| Part No. | 9DBL0853 |
|---|---|
| Datasheet | 9DBL0853 Download |
| Manufacturer |  Renesas Electronics |
| Description | LP-HCSL Zero-Delay Buffer |
| Buy | Stock & Price |
GENERAL DESCRIPTION
Recommended Application PCIe Gen1-4 and NVLINK clock distribution for Riser Cards, Storage, Networking, JBOD, Communications, Access Points OutputFEATURES
● Loss Of Signal (LOS) open drain output● 8 – 1-200 MHz Low-Power (LP) HCSL DIF pairs
● 9DBL0843 default Zout = 100Ω
● 9DBL0853 default Zout = 85Ω
● Easy AC-coupling to other logic families, see IDT application note AN-891. Key Specifications
● PCIe Gen1-4 CC compliant in ZDB or fanout buffer mode
● Supports NVLINK at 156.25M in ZDB or fanout buffer mode
● DIF cycle-to-cycle jitter <50ps
● DIF output-to-output skew < 50ps
● Bypass mode additive phase jitter is 0 ps typical rms for PCIe
● Bypass mode additive phase jitter 160fs rms typ. @ 156.25M (1.5M to 10M) Block Diagram vOE(7:0)# 7
FEATURES
/Benefits● LOS indicator signals loss of input clock; adds fault tolerance, eases system diagnostics
● Direct connection to 100Ω (xx43) or 85Ω (xx53) transmission lines; saves 32 resistors compared to standard PCIe devices...
