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9FGL0241D - 3.3V PCIe Gen1-6 Clock Generator

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Renesas

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9FGL0241D 3.3V PCIe Gen1-6 Clock Generator by Renesas - Datasheet Preview — Datasheet preview – 9FGL0241D

Datasheet Details

Part number	9FGL0241D
Manufacturer	Renesas
File Size	1.39 MB
Description	3.3V PCIe Gen1-6 Clock Generator
Datasheet	9FGL0241D Datasheet
Additional preview pages of the 9FGL0241D datasheet.

Product details

Description

6 2. Specifications . .

Features

2, 4, 6, or 8 100MHz PCIe output pairs.
One 3.3V LVCMOS REF output with Wake-On- LAN (WOL) support.
See AN-891 for easy AC-coupling to other logic families Key Specifications.
40fs RMS typical jitter (PCIe Gen6 CC).
< 50ps cycle-to-cycle jitter on differential outputs.
< 50ps output-to-output skew on differential outputs.
±0ppm synthesis error on differential outputs Features.
Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output.

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Published: Feb 7, 2025 |