Part 9FGL0241D
Description 3.3V PCIe Gen1-6 Clock Generator
Manufacturer Renesas
Size 1.39 MB
Renesas
9FGL0241D

Overview

  • 05V (9FGL06 and 9FGL08 only); Devices contain default configuration; SMBus not required; SMBus-selectable features allows optimization to customer requirements:
  • Input polarity and pull-up/pull-downs
  • Output slew rate and amplitude
  • Output impedance (85Ω or 100Ω) for each output; Contact factory for custom default configurations; 25MHz input frequency; OE# pins support PCIe CLKREQ# function; Pin-selectable SRnS 0%, CC 0% and CC/SRIS -
  • 5% spread; SMBus-selectable CC/SRIS -0.25% spread; Clean switching between the CC/SRIS spread settings; DIF outputs blocked until PLL is locked; clean system start-up; 2 selectable SMBus addresses; Space saving packages:
  • 4 × 4 mm 24-VFQFPN (9FGL02x1D)
  • 5 × 5 mm 32-VFQFPN (9FGL04x1D)
  • 5 × 5 mm 40-VFQFPN (9FGL06x1D)