Datasheet4U Logo Datasheet4U.com

HD74ALVCH16827 - 20-bit Buffers / Drivers

General Description

The HD74ALVCH16827 is composed of two 10-bit sections with separated output enable signals.

For either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active.

Key Features

  • VCC = 2.3 V to 3.6 V.
  • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
  • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C).
  • High output current ±24 mA (@VCC = 3.0 V).
  • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors Function Table Inputs OE1 L L H X H : High level H : High level X : Immaterial Z : High impedance.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74ALVCH16827 20-bit Buffers / Drivers with 3-state Outputs Hitachi Semiconductor
HD74ALVCH16820 3.3-V 10-bit Flip Flops with Dual Outputs Hitachi Semiconductor
HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs Hitachi Semiconductor
HD74ALVCH16825 18-bit Buffers / Drivers with 3-state Outputs Hitachi Semiconductor
HD74ALVCH16830 1-bit to 2-bit Address Driver with 3-state Outputs Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74ALVCH16820 3.3-V 10-bit Flip Flops
HD74ALVCH16831 1-to 4 Address Register / Driver
HD74ALVCH162244 16-bit Buffers / Drivers
HD74ALVCH162270 12-bit to 24-bit Registered Bus Exchanger
HD74ALVCH16244 16-bit Buffers / Drivers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74ALVCH16827 20-bit Buffers / Drivers with 3-state Outputs REJ03D0033-0400Z (Previous ADE-205-140B(Z)) Rev.4.00 Oct.02.2003 Description The HD74ALVCH16827 is composed of two 10-bit sections with separated output enable signals. For either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that 10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Features • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@VCC = 3.