Datasheet4U Logo Datasheet4U.com

HD74HC131 - 3-to-8-line Decoder/Demultiplexer

General Description

The HD74HC131 is 3-to-8 linedecoder.

It has Address select inputs (A, B, C) and D type register.

Address select data store to D type registers, during the positive going transition of the clock pulse.

Key Features

  • High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 V to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C).
  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC131P DILP-16 pin PRDP0016AE-B (DP-16FV) P HD74HC131FPEL SOP-16 pin (JEITA) PRSP0016DH-.

📥 Download Datasheet

Datasheet Details

Part number HD74HC131
Manufacturer Renesas
File Size 243.84 KB
Description 3-to-8-line Decoder/Demultiplexer
Datasheet download datasheet HD74HC131 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74HC131 3-to-8-line Decoder/Demultiplexer Hitachi Semiconductor
HD74HC132 Quad. 2-input NAND Schmitt Triggers Hitachi Semiconductor
HD74HC133 13-input NAND Gate Hitachi Semiconductor
HD74HC137 3-to-8-line Decoder/Demultiplexer Hitachi Semiconductor
HD74HC138 3-to-8-line Decoder/Demultiplexer Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74HC132 Quad. 2-input NAND Schmitt Triggers
HD74HC133 13-input NAND Gate
HD74HC137 3-to-8-line Decoder/Demultiplexer
HD74HC138 3-to-8-line Decoder/Demultiplexer
HD74HC139 Dual 2-to-4-line Decoders/Demultiplexers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers REJ03D0566-0200 (Previous ADE-205-440) Rev.2.00 Oct 11, 2005 Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A, B, C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High, all outputs is high.