Datasheet Details
| Part number | HD74LS75P |
|---|---|
| Manufacturer | Renesas |
| File Size | 171.53 KB |
| Description | Quadruple Bistable Latches |
| Datasheet | HD74LS75P HD74LS75 Datasheet (PDF) |
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Overview: HD74LS75 Quadruple Bistable Latches REJ03D0416-0300 Rev.3.00 May 10, 2006 The HD74LS75 is ideally suited for use as temporary storage for binary information between processing units and input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | HD74LS75P |
|---|---|
| Manufacturer | Renesas |
| File Size | 171.53 KB |
| Description | Quadruple Bistable Latches |
| Datasheet | HD74LS75P HD74LS75 Datasheet (PDF) |
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| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
| HD74LS75 | Quadruple Bistable Latches | Hitachi Semiconductor |
| Part Number | Description |
|---|---|
| HD74LS75 | Quadruple Bistable Latches |
| HD74LS73A | Dual J-K Flip-Flops |
| HD74LS73AP | Dual J-K Flip-Flops |
| HD74LS74A | Dual D-type Positive Edge-triggered Flip-Flops |
| HD74LS74AP | Dual D-type Positive Edge-triggered Flip-Flops |
| HD74LS76A | Dual J-K Flip-Flops |
| HD74LS76AP | Dual J-K Flip-Flops |
| HD74LS77 | 4-bit Bistable Latches |
| HD74LS78A | Dual J-K Flip-Flops |
| HD74LS00 | Quadruple 2-Input NAND Gates |