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HD74LS77 Datasheet 4-bit Bistable Latches

Manufacturer: Renesas

Overview: HD74LS77 4-bit Bistable Latches REJ03D0418–0300 Rev.3.00 Jul.22.2005 The HD74LS77 is ideally suited for use as temporary storage for binary information between processing units and input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high.

Key Features

  • Ordering Information Part Name Package Type HD74LS77FPEL SOP-14 pin (JEITA) Package Code (Previous Code) PRSP0014DF-B (FP-14DAV) Package Abbreviation FP Taping Abbreviation (Quantity) EL (2,000 pcs/reel) Pin Arrangement 1D 1 2D 2 Enable 3-4 3 VCC 4 3D 5 4D 6 NC 7 Q DG DG Q Q DG DG Q 14 1Q 13 2Q 12 Enable 1-2 11 GND 10 NC 9 3Q 8 4Q (Top view) Function Table Inputs D L H X H; high level,.

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Hitachi Semiconductor Logo HD74LS77 4-bit Bistable Latches Hitachi Semiconductor

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HD74LS77 Distributor