Datasheet Details
| Part number | HD74SSTV16857B |
|---|---|
| Manufacturer | Renesas |
| File Size | 3.05 MB |
| Description | 1:1 14-bit SSTL_2 Registered Buffer |
| Datasheet |
 HD74SSTV16857B Datasheet
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General Description
The HD74SSTV16857B is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.
Data flow from D to Q is controlled by differential clock pins (CLK, CLK) and the RESET.
Key Features
- Supports LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.
- Differential SSTL_2 (Stub series terminated logic) CLK signal.
- Flow through architecture optimizes PCB layout.
- Ordering Information Part Name Package Type Package Code.
