ICS487-25 Datasheet Quad Pll

Manufacturer: Renesas

Overview: QUAD PLL FOR DTV DATASHEET ICS487-25.

Datasheet Details

The ICS487-25 generates five high-quality, high-frequency clock outputs.

It is designed to replace crystals and crystal oscillators in DTV applications.

Using IDT’s patented Phase Locked Loop (PLL) techniques, the device runs from a lower frequency crystal or clock input.

Packaged in 16-pin TSSOP (Pb-free).
Replaces multiple crystals and oscillators.
Input crystal or clock frequency of 27 MHz.
Zero ppm frequency synthesis error.
Duty cycle of 45/55.
Operating voltage of 3.3 V.
Advanced, low power CMOS process Block Diagram 2 S1:0 27 MHz clock or crystal input X1/ICLK X2 Crystal Oscillator/ Clock Buffer External capacitors may be required. VDD 3 PLL1 PLL2 PLL3 ACLK 20M 48M 33.0M PLL4 24.576M.

Brand Logo	Part Number	Description	Manufacturer
	ICS487-25	Quad PLL	ICS

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