ICS557MI-01LF Datasheet | Renesas

PCI-EXPRESS GEN1 CLOCK SOURCE ICS557-01 Description The ICS557-01 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package. Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme. Features - Supports PCI-Express TM HCSL Outputs 0.7 V current mode differential pair - Supports LVDS Output Levels - Packaged in 8-pin SOIC - Ro HS 5 (green) or Ro HS 6 (green and lead free) pliant packaging - Operating voltage of 3.3 V - Low power consumption - Input frequency of 25 MHz - Short term jitter 100 ps (peak-to-peak) - Output Enable via pin selection - Industrial temperature range available - For PCIe Gen2 applications, see the 5V41064 - For PCIe Gen3 applications, see the 5V41234 Block Diagram X1 25 MHz crystal /clock X2 Clock Buffer/ Crystal Oscillator Phase Lock Loop Crystal Tuning Capacitors CLK CLK RR(IREF) IDT® PCI-EXPRESS GEN1 CLOCK SOURCE ICS557-01 REV P 072512 ICS557-01 PCI-EXPRESS GEN1 CLOCK...