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ICS859S0212I Datasheet PDF

Renesas Electronics ICS859S0212I

The ICS859S0212I is a 2:2 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The ICS859S0212I has 2 selectable differential PCLKx, nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS or CML levels.
Part No. ICS859S0212I
Datasheet ICS859S0212I Download
Manufacturer
Renesas Electronics
Description Differential-to-LVPECL/LVDS Clock Multiplexer
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ICS859S0212I datasheet page 1 preview

GENERAL DESCRIPTION

The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.

FEATURES

● High speed 2:1 differential multiplexer with a 1:2 fanout buffer
● Two differential LVPECL or LVDS output pairs
● Two selectable differential PCLKx, nPCLKx input pairs
● PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML
● Maximum output frequency: 3GHz
● Translates any single ended input signal to LVPECL levels with resistor bias on nPCLKx input
● Part-to-part skew: 100ps (maximum)
● Propagation delay: 565ps (typical) at 3.3V
● Additive phase jitter, RMS: 0.21ps (typical) at 3.3V
● Full 3.3V or 2.5V supply modes
● -40°C to 85°C ambient operating temperature
● Available in lead-free (RoHS 6) package Block Diagram OE Pullup CLK_SEL Pulldown PCLK0 Pulldown nPCLK0 Pullup/Pulldown 0 PCLK1 Pulldown nPCLK1 Pullup/Pulldown 1 Q0 nQ0 Q1 nQ1 SEL_OUT Pullup ICS859S0212BGI REVISION A JUNE 4, 2012 Pin Assignment CLK...
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