ICS9179-03 Datasheet | Renesas

ICS9179 - 03 Low Skew Fan Out Buffers General Description The ICS9179-03 generates low skew clock buffers required for high speed RISC or CISC microprocessor systems such as Intel Pentium Pro. Outputs will handle up to 133MHz clocks. An output enable is provided for testability. The device is a buffer with low output to output skew. This is a Fanout buffer device, not using an internal PLL. This buffer can also be a feedback to an external PLL stage for phase synchronization to a master clock. There are a total of ten outputs, sufficient for feedback to a PLL source and to drive four small outline DIMM modules (S.O. DIMM) at 2 clocks each. Or a total of ten outputs as a Fanout buffer from a mon clock source. The individual clock outputs are addressable through I2C to be enabled, or stopped in a low state for reduced EMI when the lines are not needed. Features - Ten High speed, low noise non-inverting buffers for (to 133MHz), clock buffer applications. - Output slew rate faster than 1.5V/ns into 20p F - Supports up to four small outline DIMMS (S.O. DIMM). - Synchronous clocks skew matched to 250 ps window on OUTPUTs (0:9). - I2C Serial Configuration interface to allow individual OUTPUTs to be stopped low. - Multiple VDD, VSS pins for noise reduction - Tri-state pin for testing - 3.0V - 3.7V supply range - 28-pin (209 mil) SSOP and (6.1mm) TSSOP package Block Diagram Pin Configuration 0258K 12/15/08 28-Pin SSOP & TSSOP Pentium Pro is a trademark of Intel Corporation I2C is a trademark of Philips Corporation ICS9179 - 03 Pin Descriptions PIN NUMBER 2,...