R5F10Y47 Datasheet PDF - Renesas MCU Specs

R5F10Y47 - MCU

This page provides the datasheet information for the R5F10Y47, a member of the R5F10Y17 MCU family.

Datasheet Summary

Features

Ultra-Low Power Technology.
2.0 to 5.5 V operation from a single supply.
Stop (RAM retained): 0.56 µA.
Operating: 46 µA /MHz RL78-S1 Core.
Instruction execution: 78 % of instructions can be executed in 1 to 2 clock cycles.
CISC architecture (Harvard) with 3-stage pipeline.
Multiply: 8 x 8 to 16-bit result in 2 clock cycles.
16-bit barrel shifter for shift & rotate in 2 clock cycle.
1-wire on-chip debug function Main Flash Memory.
Density: 1 to 4 Kbyte.

Datasheet Details

Part number	R5F10Y47
Manufacturer	Renesas
File Size	368.20 KB
Description	MCU
Datasheet	R5F10Y47 Datasheet
Additional preview pages of the R5F10Y47 datasheet.

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Full PDF Text Transcription

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Datasheet RL78/G10 RENESAS MCU True Low Power Platform (as low as 46 µA/MHz), 2.0 to 5.5V Operation, 1 to 4 Kbyte Flash for General Purpose Applications R01DS0207EJ0300 Rev.3.00 Nov 19, 2014 1. OUTLINE 1.1 Features Ultra-Low Power Technology  2.0 to 5.5 V operation from a single supply  Stop (RAM retained): 0.56 µA  Operating: 46 µA /MHz RL78-S1 Core  Instruction execution: 78 % of instructions can be executed in 1 to 2 clock cycles  CISC architecture (Harvard) with 3-stage pipeline  Multiply: 8 x 8 to 16-bit result in 2 clock cycles  16-bit barrel shifter for shift & rotate in 2 clock cycle  1-wire on-chip debug function Main Flash Memory  Density: 1 to 4 Kbyte  Flash memory rewritable voltage: 4.5 to 5.

Published: Apr 28, 2016 |