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R5F11MMF - MCU

Download the R5F11MMF datasheet PDF. This datasheet also covers the R5F11MPG variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.8 to 3.6 V.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator clock) to ultra-low speed (30.5 s: @ 32.768 kHz operation with subsystem clock).
  • Multiply/divide and multiply/accumulate.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F11MPG-Renesas.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Part Number Description
R5F11MMD MCU
R5F11MME MCU
R5F11MPE MCU
R5F11MPF MCU
R5F11MPG MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RL78/L1A R01DS0280EJ0110 RENESAS MCU  Rev.1.10 Sep 30, 2019 Integrated LCD controller/driver, 12-bit resolution A/D Converter, 12-bit resolution D/A Converter, Operational amplifier, Internal reference voltage for A/D and D/A converters. True Low Power Platform (as low as 70.8 μA/MHz, and 0.68 μA in Halt mode( RTC2 + LVD)), 1.8 V to 3.6 V operation, 48 to 128 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications. 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = single power supply voltage of 1.8 to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.