R5F572NDHDBD Overview
Features Datasheet RX72N Group ■ 32-bit RXv3 CPU core Maximum operating frequency: 240 MHz Capable of 1396 CoreMark in operation at 240 MHz Double-precision 64-bit IEEE-754 floating point A collective register bank save function is available. Supports the memory protection unit (MPU) JTAG and FINE (one-line) debugging interfaces ■ Low-power design and architecture Operation from a single 2.7- to 3.6-V supply RTC is capable of operation from a dedicated power supply. Four low-power modes ■ On-chip code flash memory Supports versions with up to 4 Mbytes of ROM No wait cycles at up to 120 MHz or when the ROM cache is hit, one-wait state at above 120 MHz User code is programmable by on-board or off-board programming. Programming/erasing as background operations (BGOs) A dual-bank structure allows exchanging the start-up bank. ■ On-chip data flash memory 32...
R5F572NDHDBD Key Features
- 32-bit RXv3 CPU core
- Maximum operating frequency: 240 MHz Capable of 1396 CoreMark in operation at 240 MHz
- Double-precision 64-bit IEEE-754 floating point
- A collective register bank save function is available
- Supports the memory protection unit (MPU)
- JTAG and FINE (one-line) debugging interfaces
- Low-power design and architecture
- Operation from a single 2.7- to 3.6-V supply
- RTC is capable of operation from a dedicated power supply
- Four low-power modes