R7F0C904 Overview
Datasheet R7F0C903-908 R01DS0237EJ0100 RENESAS MCU Rev.1.00 Jun 05, 2014 True Low Power Platform (as low as 66 µA/MHz, and 0.57 µA for LVD), 1.6 V to 5.5 V operation, 16 to 48 Kbyte Flash, 31 DMIPS at 24 MHz, for General Purpose Applications 1. OUTLINE.
R7F0C904 Key Features
- 1.6 V to 5.5 V operation from a single supply
- Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31
- Halt (LVD): 0.57 µA
- Snooze: 0.70 mA (UART), 1.20 mA (ADC)
- Operating: 66 µA/MHz
- Delivers 31 DMIPS at maximum operating frequency
- Instruction Execution: 86% of instructions can be
- CISC Architecture (Harvard) with 3-stage pipeline
- MAC: 16 x 16 to 32-bit result in 2 clock cycles
- 16-bit barrel shifter for shift & rotate in 1 clock cycle