R7S910 Overview
Preliminary Datasheet Specifications in this document are tentative and subject to RZ/T1 Group R01DS0228EJ0070 Rev.0.70 Dec 25, 2014 450 MHz/600MHz, MCU with ARM Cortex®-R4F and -M3 1, on-chip FPU, 747/996 DMIPS, up to 1 Mbyte of on-chip extended SRAM,.
R7S910 Key Features
- On-chip 32-bit ARM Cortex-R4F processor
- High-speed realtime control with maximum operating frequency of 450/600 MHz Capable of 747/996 DMIPS (in operation at 45
- On-chip 32-bit ARM Cortex-R4F (revision r1p4)
- Tightly coupled memory (TCM) with ECC: 512 Kbytes/32 Kbytes
- Instruction cache/data cache with ECC: 8 Kbytes per cache
- High-speed interrupt
- The FPU supports addition, subtraction, multiplication, division, multiply-and-accumulate, and square-root operations at
- Harvard architecture with 8-stage pipeline
- Supports the memory protection unit (MPU)
- ARM CoreSight architecture, includes support for debugging through JTAG and SWD interfaces