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TP65H300G4LSG - 650V SuperGaN FET

Key Features

  • JEDEC-qualified GaN technology.
  • Dynamic RDS(on)eff production tested.
  • Robust design, defined by.
  • Intrinsic lifetime tests.
  • Wide gate safety margin.
  • Transient over-voltage capability.
  • Enhanced inrush current capability.
  • Very low QRR.
  • Reduced crossover loss Benefits.
  • Enables AC-DC bridgeless totem-pole PFC designs.
  • Increased power density.
  • Reduced system size and weight.
  • Overall lower system cost.
  • Achiev.

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Full PDF Text Transcription (Reference)

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Specifications in this document are tentative and subject to change Datasheet TP65H300G4LSG 650V SuperGaN® FET in PQFN (source tab) PDereslcimripintaioryn Datasheet The TP65H300G4LSG 650V, 240 mΩ gallium nitride (GaN) FET is a normally-off device using Renesas’s Gen IV platform. It combines a state-of-the-art high voltage GaN HEMT with a low voltage silicon MOSFET to offer superior reliability and performance. The Gen IV SuperGaN® platform uses advanced epi and patented design technologies to simplify manufacturability while improving efficiency over silicon via lower gate charge, output capacitance, crossover loss, and reverse recovery charge.