V103 Description
The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA+ resolutions and can be used in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a...
V103 Key Features
- Pin patible with THine THC63LVD103
- Wide pixel clock range: 8
- 135 MHz
- Supports a wide range of video and graphics modes
- Internal PLL requires no external loop filter
- Selectable rising or falling clock edge for data
- patible with Spread Spectrum clock source
- Reduced LVDS output voltage swing mode
- Single 3.3 V supply
- Low power consumption CMOS design
V103 Applications
- Pin patible with THine THC63LVD103