X9250 Datasheet | Renesas

Low Noise/Low Power/SPI Bus/256 Taps Quad Digitally Controlled Potentiometers (XDCP™) FN8165 Rev.3.00 August 29, 2006 Features - Four potentiometers in one package - 256 resistor taps/pot - 0.4% resolution - SPI serial interface - Wiper resistance, 40 typical @ VCC = 5V - Four nonvolatile data registers for each pot - Nonvolatile storage of wiper position - Standby current < 5µA max (total package) - Power supplies - VCC = 2.7V to 5.5V - V+ = 2.7V to 5.5V - V- = -2.7V to -5.5V - 100k, 50k total pot resistance - High reliability - Endurance - 100,000 data changes per bit per register - Register data retention - 100 years - 24 Ld SOIC, 24 Ld TSSOP - Dual supply version of X9251 - Pb-free plus anneal available (Ro HS pliant) DESCRIPTION The X9250 integrates 4 digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the SPI bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power up recalls the contents of DR0 to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. BLOCK DIAGRAM VCC...