Datasheet Details
| Part number | uPD46185362B |
|---|---|
| Manufacturer | Renesas |
| File Size | 613.15 KB |
| Description | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| Datasheet | uPD46185362B uPD46185092B Datasheet (PDF) |
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Overview: μPD46185092B μPD46185182B μPD46185362B Datasheet 18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION R10DS0112EJ0200 Rev.2.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | uPD46185362B |
|---|---|
| Manufacturer | Renesas |
| File Size | 613.15 KB |
| Description | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| Datasheet | uPD46185362B uPD46185092B Datasheet (PDF) |
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The μPD46185092B is a 2,097,152-word by 9-bit, the μPD46185182B is a 1,048,576-word by 18-bit and the μPD46185362B is a 524,288-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.
The μPD46185092B, μPD46185182B and μPD46185362B integrate unique synchronous peripheral circuitry and a burst counter.
All input registers controlled by an input clock pair (K and K#) are latched on the positive edge of K and K#.
| Part Number | Description |
|---|---|
| uPD46185364B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46185084B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46185092B | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| uPD46185094B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46185182B | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| uPD46185184B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46184095B | 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |
| uPD46184182B | 18M-BIT DDR II SRAM 2-WORD BURST OPERATION |
| uPD46184184B | 18M-BIT DDR II SRAM 4-WORD BURST OPERATION |
| uPD46184185B | 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |