RK2729 Datasheet | Rockchip

Overview RK2729 is a highly-integrated, high-performance, low-power digital multimedia processor which is based on Dual Core (DSP+CPU) architecture with hardware accelerator. RK2729 is focus on EBOOK application, it can support TFT and EPD display for various ebook formats, like PDF，EPUB, FB2,etc.. With DSP software, RK2729 also can decode various types of video formats, resolution up to 1280x720 formats. The DSP also can decoder picture for photo and ebook application. 1.2 Features z System Operation - Dual Core Architecture (ARM926EJC + DSP) - Support system boot sequentially from ARM to DSP - Support address remap function - For two cores, all modules have unified address space - ARM9 JTAG debug method z munication between two cores - Support share memory and interactive interrupt method to plete munication - Processor Interface Unit (PIU) ‹ Built-in three mand/reply protocols registers and three Semaphore registers to accessed by two cores ‹ Support three semaphore-related interrupts and one mand-reply-related interrupt between two cores z Clock & Power Management - Three on-chip PLLs for ARM9 subsystem, DSP subsystem and Other logic - Support different DSP Core and internal AHB Bus clock ratio: 1:1, 1:2, 1:3, 1:4, up to 1:16 mode - Support different DSP internal AHB Bus and internal APB Bus clock ratio: 1:1, 1:2, 1:3, 1:4, up to 1:16 mode - Support different ARM9 core and AHB Bus clock ratio: 1:1, 1:2, 1:3 and 1:4 mode - Support different ARM AHB Bus and ARM APB Bus clock ratio: 1:1, 1:2 and 1:4 modes - 6 types of work modes by clock gating to save power : ‹ Normal mode : Normal operating mode ‹ Slow mode : Low frequency clock (24MHz) without PLL ‹ Deep Slow mode : More Low frequency clock (32.768KHz) without PLL ‹ Idle mode : The clock for only CPU is stopped , ‹ Sleep mode Wake up by any interrupts to CPU from idle mode : The clock for only DSP is stopped , Wake up from sleep mode by some interrupts to ‹ Stop mode DSP or register set...