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BR24L04FJ-W - 5128 bit electrically erasable PROM

Datasheet Summary

Features

  • 1) 512 registers × 8 bits serial architecture. 2) Single power supply (1.8V to 5.5V). 3) Two wire serial interface. 4) Self-timed write cycle with automatic erase. 5) 16byte Page Write mode. 6) Low power consumption. Write (5V) : 1.2mA (Typ. ) Read (5V) : 0.2mA (Typ. ) Standby (5V) : 0.1µA (Typ. ) 7) DATA security Write protect feature (WP pin). Inhibit to WRITE at low VCC. 8) Small package - - - DIP8 / SOP8 / SOP-J8 / SSOP-B8 / MSOP-8 9) High reliability EEPROM with Double-Cell structure 10) High.

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Datasheet Details

Part number BR24L04FJ-W
Manufacturer ROHM
File Size 388.17 KB
Description 5128 bit electrically erasable PROM
Datasheet download datasheet BR24L04FJ-W Datasheet
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Full PDF Text Transcription

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Memory ICs BR24L04-W / BR24L04F-W / BR24L04FJ-W BR24L04FV-W / BR24L04FVM-W 512×8 bit electrically erasable PROM BR24L04-W / BR24L04F-W / BR24L04FJ-W / BR24L04FV-W / BR24L04FVM-W The BR24L04-W series is 2-wire (I2C BUS type) serial EEPROMs which are electrically programmable. ∗ I C BUS is a registered trademark of Philips. 2 zApplications General purpose zFeatures 1) 512 registers × 8 bits serial architecture. 2) Single power supply (1.8V to 5.5V). 3) Two wire serial interface. 4) Self-timed write cycle with automatic erase. 5) 16byte Page Write mode. 6) Low power consumption. Write (5V) : 1.2mA (Typ.) Read (5V) : 0.2mA (Typ.) Standby (5V) : 0.1µA (Typ.) 7) DATA security Write protect feature (WP pin). Inhibit to WRITE at low VCC.
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