DESCRIPTION
FINAL FEATURES
DATASHEET ACS8522 SETS LITE The device supports Free-run, Locked and Holdover modes, with mode selection controlled either automatically by an internal state machine or forced by register configuration. The ACS8522 accepts up to four independent input SEC reference clock sources from Recovered Line Clock, PDH network, and Node Synchronization. The ACS8522 generates independent SEC and BITS clocks, an 8 kHz Frame Synchronization clock and a 2 kHz Multi-Frame Synchronization clock, both with programmable pulse width and polarity. The ACS8522 includes a Serial Port, which can be SPI compatible, providing access to the configuration and status registers for device setup. The ACS8522 supports IEEE 1149.1[5] JTAG boundary scan. The User can choose between OCXO or TCXO to define the Stratum and/or Holdover performance required. Suitable for Stratum 3, 4E, 4 and SONET Minimum Clock (SMC) or SONET/SDH Equipment Clock (SEC) applications (to Telcordia 1244-CORE[19] St...