M4027 Datasheet | SGS

110S INTEGRATED CIRCUIT ?-------------------------------------------------------- - 4096-BIT DYNAMIC RANDOM ACCESS MEMORY .- POWER SUPPLY Voo= 12V, Vee= 5V, Vee= -5V (ALL WITH ± 10% TOLERANCE) ' . ALL INPUTS ARE LOW CAPACITANCE AND TTL PATIBLE - - INPUT LATCHES FOR ADDRESSES, CHIP SELECT AND DATA IN ~. INPUTS PROTECTED AGAINST STATIC CHARGE C.; . THREE-STATE TTL PATIBLE OUTPUT OUTPUT DATA LATCHED AND VALID INTO NEXT CYCLE .- ' ECLPATIBLE ON Vee POWER SUPPLY (-5.7V) - LOW POWER CONSUMPTION: ACTIVE POWER UNDER 470 m W STANDBY POWER UNDER 27 m W - ORGANIZATION 4096 x 1 BIT IN 16-PIN STD PACKAGE /. FUNCTIONAL AND PIN PATIBLE WITH MK4027 .- ACCESS TIME: TYPE M 4027-2 150 ns TYPE M 4027-3 200 ns TYPE M 4027-4 250 ns The M 4027 is a 4096 word by 1 bit dynamic N-channel silicon gate MOS RAM. The M 4027 uses a single transistor cell utilizing a dynamic storage technique and dynamic control circuitry with low power dissipation. A unique multiplexing and latching technique for the address inputs permits the M 4027 to be mounted in a standard 16-pin package. The M 4027 incorporates several flexible operating modes. In addition to the usual read and write cycles, read modify write, page mode and RAS-only refresh cycles are available with the M 4027. Page-mode timing is very useful in systems requiring Direct Memory Access (DMA). The device is available in 16-lead dual in-line plastic or ceramic package (metal-seal), and ceramic package (frit-seal). ABSOLUTE MAXIMUM RATINGS- Voltage on any pin relative to Vee Voltage on V oo , Vee relative to Vss > Vee-Vss (Voo-Vss O) Operating temperature Storage temperature for ceramic package for plastic package Short circuit output current Total power dissipation -0.5 to +20 -1 to +15 V o V Oto +70 °C -65 to +150 °C -55 to +125 °C 50 m A 1W - Stresses greater than those listed under "Absolute Maximum Ratings' may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any...