S71NS032J - Stacked Multi-Chip Product (MCP)

This page provides the datasheet information for the S71NS032J, a member of the S71NS-J Stacked Multi-Chip Product (MCP) family.

Product Overview

SPANSION

Part number	S71NS032J
Manufacturer	SPANSION
File Size	243.72 KB
Description	Stacked Multi-Chip Product (MCP)
Datasheet	S71NS032J Datasheet
Additional preview pages of the S71NS032J datasheet.

of Spansion data sheet designations are presented here to highlight their presence and definitions.

The Advance Information designation indicates that Spansion Inc.

is developing one or more specific products, but has not committed any design to production.

Single 1.8 volt read, program and erase (1.7 to 1.95 V).
Multiplexed Data and Address for reduced I/O count.
A15.
A0 multiplexed as DQ15.
DQ0.
Addresses are latched by AVD# control input when CE# low.
Simultaneous Read/Write operation.
Data can be continuously read from one bank while executing erase/program functions in other bank.
Zero latency between read and write operations.
Package.
56-ball Ve.

Other Datasheets by SPANSION

Published: Dec 23, 2006 |