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M54HC699 - HC697/699 U/D 4 BIT BINARY COUNTER/REGISTER 3-STATE HC696/698 U/D DECADE COUNTER/REGISTER 3-STATE

This page provides the datasheet information for the M54HC699, a member of the M54 HC697/699 U/D 4 BIT BINARY COUNTER/REGISTER 3-STATE HC696/698 U/D DECADE COUNTER/REGISTER 3-STATE family.

Datasheet Summary

Description

The HC696/697 are high speed CMOS up/down counters fabricated with silicon gate C2MOS technology.

They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

The HC696/698 are BCD DECADE COUNTER, and the HC697/699 are 4-BIT BINARY COUNTER.

Features

  • enable P and enable T and a ripple-carry output for easy expansion. the register/counter select input, R/C, selects the counter when low or the register when high for the three state outputs, QA, QB, Qc and QD. Both the counter clock CCK and register clock RCK are positive-edge triggered. The counter clear CCLR is active low and is synchronous for HC698/699, and asynchronous for HC696/697. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Mar.

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Datasheet Details

Part number M54HC699
Manufacturer STMicroelectronics
File Size 429.86 KB
Description HC697/699 U/D 4 BIT BINARY COUNTER/REGISTER 3-STATE HC696/698 U/D DECADE COUNTER/REGISTER 3-STATE
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Full PDF Text Transcription

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M54/74HC696/697 M54/74HC698/699 HC696/698 U/D DECADE COUNTER/REGISTER (3-STATE) HC697/699 U/D 4 BIT BINARY COUNTER/REGISTER (3-STATE) . . . . . . . . HIGH SPEED fMAX = 50 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS (for QA to QD) 10 LSTTL LOADS (for RCO) SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 6 mA (MIN.) FOR QA TO QD |IOH| = IOL = 4 mA (MIN.
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