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M616Z08 - 128 Kbit 8 Kbit x 16 SRAM WITH OUTPUT ENABLE

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M616Z08 128 Kbit (8 Kbit x 16) SRAM WITH OUTPUT ENABLE FEATURES SUMMARY s OPERATION VOLTAGE: 2.34V to 3.6V s 8 Kbit x 16 SRAM s EQUAL CYCLE and ACCESS TIMES: AS FAST AS 20ns s TRI-STATE COMMON I/O s TWO WRITE ENABLE PINS ALLOW WRITING TO UPPER AND LOWER BYTES Figure 1. 44-pin, Hatless SOIC Package 44 1 SO44 (MH) Figure 2. Logic Diagram VCC 13 A0-A12 16 DQ0-DQ15 WE0 WE1 CE OE M616Z08 TO VSS AI04213 Table 1. Signal Names A0-A12 Address Inputs DQ0-DQ15 Data Input/Output CE Chip Enable OE Output Enable WE0 WRITE Enable DQ 0-7 WE1 WRITE Enable DQ 8-15 VCC Supply Voltage VSS Ground TO Time-Out Pin Note: TO Pin should be connected to VCC. July 2002 1/14 M616Z08 TABLE OF CONTENTS DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .