M74HC10 Datasheet | STMicroelectronics

TRIPLE 3-INPUT NAND GATE s s s s s s s HIGH SPEED: t PD = 8ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4m A (MIN) BALANCED PROPAGATION DELAYS: t PLH ≅ t PHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION PATIBLE WITH 74 SERIES 10 TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC10B1R M74HC10M1R T&R M74HC10RM13TR M74HC10TTR DESCRIPTION The M74HC10 is an high speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with silicon gate C2MOS technology. The internal circuit is posed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/8 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L X X H X : Don‘t Care B X L X H C X X L H Y H H H...