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M74HC107 - DUAL J-K FLIP FLOP

General Description

OC2MOS technology.

These flip-flop are edge -sensitive to the clock input and change state on t(s)the negative going transition of the clock pulse.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M74HC107 DUAL J-K FLIP FLOP WITH CLEAR s HIGH SPEED : fMAX = 80MHz (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: )VNIH = VNIL = 28 % VCC (MIN.) t(ss SYMMETRICAL OUTPUT IMPEDANCE: c|IOH| = IOL = 4mA (MIN) us BALANCED PROPAGATION DELAYS: dtPLH ≅ tPHL ros WIDE OPERATING VOLTAGE RANGE: PVCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH te74 SERIES 107 oleDESCRIPTION bsThe M74HC107 is an high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate OC2MOS technology. These flip-flop are edge -sensitive to the clock input and change state on t(s)the negative going transition of the clock pulse.