Datasheet Details
| Part number | M74HC137 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 256.38 KB |
| Description | 3 TO 8 LINE DECODER/LATCH INVERTING |
| Datasheet | M74HC137_STMicroelectronics.pdf |
|
|
Overview: M54HC137 M74HC137 3 TO 8 LINE DECODER/LATCH (INVERTING) . . . . . . . . HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.
| Part number | M74HC137 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 256.38 KB |
| Description | 3 TO 8 LINE DECODER/LATCH INVERTING |
| Datasheet | M74HC137_STMicroelectronics.pdf |
|
|
|
The M54/74HC137 is a high speed CMOS 3 TO 8LINE DECODER/LATCH (INVERTING) fabricated in silicon gate C2MOS technology.
It has the same high speed performance of LSTTL bined with true CMOS low power consumption.
This device is a 3 to 8line decoder withlatches on thethree address inputs.
| Part Number | Description |
|---|---|
| M74HC131 | 3 TO 8 LINE DECODER/LATCH |
| M74HC132 | QUAD 2-INPUT SCHMITT NAND GATE |
| M74HC133 | 13 INPUT NAND GATE |
| M74HC138 | 3 TO 8 LINE DECODER INVERTING |
| M74HC139 | DUAL 2 TO 4 DECODER/DEMULTIPLEXER |
| M74HC10 | TRIPLE 3-INPUT NAND GATE |
| M74HC107 | DUAL J-K FLIP FLOP |
| M74HC11 | TRIPLE 3-INPUT AND GATE |
| M74HC112 | DUAL J-K FLIP FLOP WITH PRESET AND CLEAR |
| M74HC113 | DUAL J-K FLIP FLOP WITH PRESET |