M74HC138
DESCRIPTION
The M74HC138 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate C2MOS technology. If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP SOP TSSOP
M74HC138B1R M74HC138M1R
T&R
M74HC138RM13TR M74HC138TTR inhibited and all the 8 outputs go high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 2, 3 4, 5 6
9, 10, 11, 12, 13, 14, 15, 7 8 16
SYMBOL
A, B, C G2A, G2B
G1 Y0 to Y7
NAME AND FUNCTION
Address Inputs Enable Inputs Enable Input Data Outputs
GND VCC
Ground...
