Datasheet Details
| Part number | M74HC76 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 251.88 KB |
| Description | DUAL J-K FLIP-FLOP |
| Datasheet | M74HC76_STMicroelectronics.pdf |
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Overview: M54HC76 M74HC76 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 65 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.
| Part number | M74HC76 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 251.88 KB |
| Description | DUAL J-K FLIP-FLOP |
| Datasheet | M74HC76_STMicroelectronics.pdf |
|
|
|
The M54/74HC76 is a high speed CMOS DUAL J-K FLIP FLOP fabricated in silicon gate C 2MOS technology.
It has the same high speed performance of LSTTL combined with true CMOS low power consumption.
Depending on with the logic level at the J and K inputs this device changes state on the negative going transition of the clock pulse.
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