ST13P10D
DESCRIPTION
ST13P10D is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The ST13P10D has been designed specially to improve the overall efficiency of DC/DC converters using either synchronous or onventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.
PIN CONFIGURATION (D-PAK)
FEATURE
TO-252 l -100V/-13.0A, RDS(ON) = 130mΩ @VGS = -10V l Super high density cell design for extremely low RDS(ON) l Exceptional on-resistance and maximum DC current capability l TO-252 package design
PART MARKING
Y: Year Code A: Process Code B：Wafer Code
STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA .stansontech.
Copyright © 2009, Stanson Corp.
ST13P10D 2009. V1
P Channel Enhancement Mode MOSFET
-13.0A
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter Drain-Source Voltage
Symbo l
VDSS
Typical...
