10F269-T3 Datasheet | STMicroelectronics

ST10F269-T3 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM HIGH PERFORMANCE 32MHz CPU WITH DSP FUNCTION - 16-BIT CPU WITH 4-STAGE PIPELINE - 62.5ns INSTRUCTION CYCLE TIME AT 32MHz .. MAX CPU CLOCK - MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR - REPEAT UNIT - ENHANCED BOOLEAN BIT MANIPULATION FACILITIES - ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS - SINGLE-CYCLE CONTEXT SWITCHING SUPPORT s MEMORY ORGANIZATION - 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. - 100K ERASING/PROGRAMMING CYCLES. - UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTES WITH CAN) - 2K BYTE ON-CHIP INTERNAL RAM (IRAM) - 10K BYTE ON-CHIP EXTENSION RAM (XRAM) s FAST AND FLEXIBLE BUS - PROGRAMMABLE EXTERNAL BUS CHARACTERISTICS FOR DIFFERENT ADDRESS RANGES - 8-BIT OR 16-BIT EXTERNAL DATA BUS - MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES - FIVE PROGRAMMABLE CHIP-SELECT SIGNALS - HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT s INTERRUPT - 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE INTERRUPT DRIVEN DATA TRANSFER - 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLING RATE DOWN TO 31.25ns s TIMERS - TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS - TWO 16-CHANNEL CAPTURE / PARE UNITS s A/D CONVERTER - 16-CHANNEL 10-BIT - 6.06µs CONVERSION TIME AT 32MHz CPU CLOCK s 4-CHANNEL PWM UNIT s SERIAL CHANNELS - SYNCHRONOUS / ASYNCHRONOUS SERIAL CHANNEL - HIGH-SPEED SYNCHRONOUS CHANNEL s TQFP144 (20 x 20 x 1.40 mm) (Thin Quad Flat Pack) ORDER CODE: ST10F269-T3 s s TWO CAN 2.0B INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2x15 MESSAGE OBJECTS) FAIL-SAFE PROTECTION - PROGRAMMABLE WATCHDOG TIMER - OSCILLATOR WATCHDOG s s ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL - DIRECT OR PRESCALED CLOCK INPUT s s REAL TIME CLOCK UP TO 111 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE OUTPUT OR SPECIAL FUNCTION AS INPUT, - PROGRAMMABLE...