Datasheet Details
| Part number | 74LVQ373 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 75.03 KB |
| Description | OCTAL D-TYPE LATCH |
| Datasheet | 74LVQ373_STMicroelectronics.pdf |
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Overview: ® 74LVQ373 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING s s s s s s s s s s s HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2VData Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ373M 74LVQ373T input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely. When the LE is taken low, the Q outputs will be latched precisely at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consuption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
| Part number | 74LVQ373 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 75.03 KB |
| Description | OCTAL D-TYPE LATCH |
| Datasheet | 74LVQ373_STMicroelectronics.pdf |
|
|
|
The LVQ373 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
It is ideal for low power and low noise 3.3V applications.
These 8 bit D-Type latchs are controlled by a latch enable input (LE) and an output enable PIN CONNECTION AND IEC LOGIC SYMBOLS February 1999 1/10 74LVQ373 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 6, 9, 12, 15, 17, 18 3, 4, 7, 8, 13, 14, 17, 18 11 10 20 SYMBOL OE D0 to D7 NAME AND FUNCT ION 3 State Output Enable Input (Active LOW) Data Inputs Q0 to Q7 3 State Outputs LE GND VCC Latch Enable Input Ground (0V) Positive Su
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| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
 |
74LVQ373 | Low Voltage Octal Transparent Latch | Fairchild Semiconductor |
| Part Number | Description |
|---|---|
| 74LVQ32 | QUAD 2-INPUT OR GATE |
| 74LVQ00 | QUAD 2-INPUT NAND GATE |
| 74LVQ02 | QUAD 2-INPUT NOR GATE |
| 74LVQ04 | HEX INVERTER |
| 74LVQ08 | QUAD 2-INPUT AND GATE |
| 74LVQ125 | QUAD BUS BUFFERS 3-STATE |
| 74LVQ138 | 3 TO 8 LINE DECODER INVERTING |
| 74LVQ14 | HEX SCHMITT INVERTER |
| 74LVQ157 | LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER |
| 74LVQ161 | SYNCHRONOUS PRESETTABLE 4-BIT COUNTER |